About Me
I am Viswanathan Subramanian. I am from Chennai, India. I am a PhD student in the Department of Electrical & Computer Engineering at Iowa State University, Ames, IA . I am part of the Dependable Computing & Networking Lab under Prof. Arun Somani. My research interests are in reliable fault-tolerant architectures, high performance and power efficient computer system design. You can find my resume here.
Publications
Conference Publications
- Ganesh T S, Viswanathan Subramanian and Arun Somani, “ SEU Mitigation Techniques for Microprocessor Control Logic “, EDCC, 2006
- Viswanathan Subramanian, Mikel Bezdek, Naga Durga Prasad Avirneni and Arun Somani, “ Superscalar Processor Performance Enhancement Through Reliable Dynamic Clock Frequency Tuning”, in Proc. of DCCS-DSN 2007, June 2007. pp 196-205
- Viswanathan Subramanian and Arun K. Somani, “Conjoined Pipeline: Enhancing Hardware Reliability and Performance through Organized Pipeline Redundancy”, in 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC '08, pp.9-16, 15-17 Dec. 2008
- Naga Durga Prasad Avirneni, Viswanathan Subramanian and Arun K. Somani “Low Overhead Soft Error Mitigation Techniques for High-Performance and Aggressive Systems”, To appear in Proc. of DCCS-DSN 2009, June 2009
Refereed Workshop Publications
- Viswanathan Subramanian, Naga Durga Prasad Avirneni and Arun Somani, “Conjoined Processor: A Fault Tolerant High Performance Microprocessor”, Poster Paper, in Proc. of SELSE 2008, Austin, TX, March 2008
- Prem Kumar Ramesh, Viswanathan Subramanian, and Arun K. Somani,c “Thermal Management in Reliably Overclocked Systems”, Poster Paper, To Appear in Proc. of SELSE 2009
- Naga Durga Prasad Avirneni, Viswanathan Subramanian and Arun K. Somani, “Soft Error Mitigation Schemes for High Performance and Aggressive Designs”, To Appear in Proc. of SELSE 2009
Links
Contact Details
Email: visu@iastate.edu
Current Address: 141 Campus Avenue, Apt 4, Ames, IA 50014